Calibration - ST STM32F100 Series Reference Manual

RM0041
conversion
second trigger: sequence converted 3, 6, 7. An EOC event is generated at each
conversion
third trigger: sequence converted 9, 10. An EOC event is generated at each conversion
fourth trigger: sequence converted 0, 1, 2. An EOC event is generated at each
conversion
Note: When a regular group is converted in discontinuous mode, no rollover will occur. When all
sub groups are converted, the next trigger starts conversion of the first sub-group.
In the example above, the fourth trigger reconverts the first sub-group channels 0, 1 and 2.
Injected group
This mode is enabled by setting the JDISCEN bit in the ADC_CR1 register. It can be used to
convert the sequence selected in the ADC_JSQR register, channel by channel, after an
external trigger event.
When an external trigger occurs, it starts the next channel conversions selected in the
ADC_JSQR registers until all the conversions in the sequence are done. The total sequence
length is defined by the JL[1:0] bits in the ADC_JSQR register.
Example:
n = 1, channels to be converted = 1, 2, 3
first trigger: channel 1 converted
second trigger: channel 2 converted
third trigger: channel 3 converted and EOC and JEOC events generated
fourth trigger: channel 1
Note: When all injected channels are converted, the next trigger starts the conversion of the first
injected channel. In the example above, the fourth trigger reconverts the first injected
channel 1.
It is not possible to use both auto-injected and discontinuous modes simultaneously.
The user must avoid setting discontinuous mode for both regular and injected groups
together. Discontinuous mode must be enabled only for one group conversion.
10.4

Calibration

The ADC has an built-in self calibration mode. Calibration significantly reduces accuracy
errors due to internal capacitor bank variations. During calibration, an error-correction code
(digital word) is calculated for each capacitor, and during all subsequent conversions, the
error contribution of each capacitor is removed using this code.
Calibration is started by setting the CAL bit in the ADC_CR2 register. Once calibration is
over, the CAL bit is reset by hardware and normal conversion can be performed. It is
recommended to calibrate the ADC once at power-on. The calibration codes are stored in
the ADC_DR as soon as the calibration phase ends.
Note: It is recommended to perform a calibration after each power-up.
Before starting a calibration, the ADC must have been in power-on state (ADON bit = '1') for
at least two ADC clock cycles.
RM0041 Rev 6
Analog-to-digital converter (ADC)
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