Single Conversion Mode; Continuous Conversion Mode; Timing Diagram - ST STM32F100 Series Reference Manual

RM0041
Temperature sensor/V
The temperature sensor is connected to channel ADCx_IN16 and the internal reference
voltage V
and converted as injected or regular channels.
Note: The sensor and V
10.3.4

Single conversion mode

In Single conversion mode the ADC does one conversion. This mode is started either by
setting the ADON bit in the ADC_CR2 register (for a regular channel only) or by external
trigger (for a regular or injected channel), while the CONT bit is 0.
Once the conversion of the selected channel is complete:
•
If a regular channel was converted:
–
–
–
• If an injected channel was converted:
–
–
–
The ADC is then stopped.
10.3.5

Continuous conversion mode

In continuous conversion mode ADC starts another conversion as soon as it finishes one.
This mode is started either by external trigger or by setting the ADON bit in the ADC_CR2
register, while the CONT bit is 1.
After each conversion:
•
If a regular channel was converted:
–
–
–
•
If an injected channel was converted:
–
–
–
10.3.6

Timing diagram

As shown in
converting accurately. After the start of ADC conversion and after 14 clock cycles, the EOC
flag is set and the 16-bit ADC Data register contains the result of the conversion.
REFINT
is connected to ADCx_IN17. These two internal channels can be selected
REFINT
are only available on the master ADC1 peripheral.
REFINT
The converted data is stored in the 16-bit ADC_DR register
The EOC (End Of Conversion) flag is set
and an interrupt is generated if the EOCIE is set.
The converted data is stored in the 16-bit ADC_DRJ1 register
The JEOC (End Of Conversion Injected) flag is set
and an interrupt is generated if the JEOCIE bit is set.
The converted data is stored in the 16-bit ADC_DR register
The EOC (End Of Conversion) flag is set
An interrupt is generated if the EOCIE is set.
The converted data is stored in the 16-bit ADC_DRJ1 register
The JEOC (End Of Conversion Injected) flag is set
An interrupt is generated if the JEOCIE bit is set.
Figure 25, the ADC needs a stabilization time of t
internal channels
RM0041 Rev 6
Analog-to-digital converter (ADC)
before it starts
STAB
165/709
189