Table 117. Fsmc_Btrx Bit Fields - ST STM32F100 Series Reference Manual

RM0041
Bit No.
9
8
7
6
5-4
3-2
1
0
Bit No.
31:30
29:28
27-24
23-20
19-16
15-8
7-4
3-0
Table 116. FSMC_BCRx bit fields (continued)
Bit name
WAITPOL to be set according to memory
BURSTEN no effect on synchronous write
Reserved 0x1
FACCEN Set according to memory support
MWID As needed
MTYP[0:1] 0x1
MUXEN As needed
MBKEN 0x1

Table 117. FSMC_BTRx bit fields

Bit name
Reserved 0x0
ACCMOD 0x0
DATLAT Data latency
0x0 to get CLK = HCLK (not supported)
CLKDIV
0x1 to get CLK = 2 × HCLK
BUSTURN Time between NEx high to NEx low (BUSTURN HCLK)
DATAST Don't care
ADDHLD Don't care
ADDSET[3:0] Don't care
RM0041 Rev 6
Flexible static memory controller (FSMC)
Value to set
Value to set
525/709
535