ST STM32F100 Series Reference Manual page 436

General-purpose timers (TIM15/16/17)
Table 81. TIM15 register map and reset values (continued)
Offset Register
TIM15_RCR
0x30
Reset value
TIM15_CCR1
0x34
Reset value
TIM15_CCR2
0x38
Reset value
TIM15_BDTR
0x44
Reset value
TIM15_DCR
0x48
Reset value
TIM15_DMAR
0x4C
Reset value
Refer to
436/709
Reserved
Reserved
Reserved
Reserved
Reserved
Section 2.3: Memory map
Reserved
0 0
0 0
0 0
0 0
for the register boundary addresses.
RM0041 Rev 6
0 0
CCR1[15:0]
0 0 0 0 0 0 0 0
CCR2[15:0]
0 0 0 0 0 0 0 0
LOCK
[1:0]
0 0 0 0 0 0 0 0
DBL[4:0]
Reserved
0 0 0 0 0
DMAB[15:0]
0 0 0 0 0 0 0 0
RM0041
REP[7:0]
0 0 0 0 0 0
0 0 0 0 0 0
0 0 0 0 0 0
DT[7:0]
0 0 0 0 0 0
DBA[4:0]
0 0 0 0 0
0 0 0 0 0 0