RM0041
Input capture mode
Bits 15:12 IC2F: Input capture 2 filter
Bits 11:10 IC2PSC[1:0]: Input capture 2 prescaler
Bits 9:8 CC2S: Capture/compare 2 selection
Note: The CC2S bits are writable only when the channel is OFF (CC2E = 0 in TIMx_CCER).
Bits 7:4 IC1F: Input capture 1 filter
Bits 3:2 IC1PSC: Input capture 1 prescaler
Bits 1:0 CC1S: Capture/Compare 1 selection
Note: The CC1S bits are writable only when the channel is OFF (CC1E = 0 in TIMx_CCER).
This bitfield defines the direction of the channel (input/output) as well as the used input.
00: CC2 channel is configured as output
01: CC2 channel is configured as input, IC2 is mapped on TI2
10: CC2 channel is configured as input, IC2 is mapped on TI1
11: CC2 channel is configured as input, IC2 is mapped on TRC. This mode works only if an
internal trigger input is selected through the TS bit (TIMx_SMCR register)
This bitfield defines the frequency used to sample the TI1 input and the length of the digital
filter applied to TI1. The digital filter is made of an event counter in which N consecutive
events are needed to validate a transition on the output:
0000: No filter, sampling is done at f
0001: f
=f
SAMPLING
CK_INT
0010: f
=f
SAMPLING
CK_INT
0011: f
=f
SAMPLING
CK_INT
0100: f
=f
/2, N=6
SAMPLING
DTS
0101: f
=f
/2, N=8
SAMPLING
DTS
0110: f
=f
/4, N=6
SAMPLING
DTS
0111: f
=f
/4, N=8
SAMPLING
DTS
1000: f
=f
/8, N=6
SAMPLING
DTS
1001: f
=f
/8, N=8
SAMPLING
DTS
1010: f
=f
/16, N=5
SAMPLING
DTS
1011: f
=f
/16, N=6
SAMPLING
DTS
1100: f
=f
/16, N=8
SAMPLING
DTS
1101: f
=f
/32, N=5
SAMPLING
DTS
1110: f
=f
/32, N=6
SAMPLING
DTS
1111: f
=f
/32, N=8
SAMPLING
DTS
This bitfield defines the ratio of the prescaler acting on the CC1 input (IC1).
The prescaler is reset as soon as CC1E='0' (TIMx_CCER register).
00: no prescaler, capture is done each time an edge is detected on the capture input
01: capture is done once every 2 events
10: capture is done once every 4 events
11: capture is done once every 8 events
This bitfield defines the direction of the channel (input/output) as well as the used input.
00: CC1 channel is configured as output
01: CC1 channel is configured as input, IC1 is mapped on TI1
10: CC1 channel is configured as input, IC1 is mapped on TI2
11: CC1 channel is configured as input, IC1 is mapped on TRC. This mode is working only if
an internal trigger input is selected through TS bit (TIMx_SMCR register)
General-purpose timers (TIM12/13/14)
DTS
, N=2
, N=4
, N=8
RM0041 Rev 6
373/709
455
Need help?
Do you have a question about the STM32F100 Series and is the answer not in the manual?
Questions and answers