ST STM32F100 Series Reference Manual page 690

Debug support (DBG)
Bits 20:18 DBG_TIMx_STOP: TIMx counter stopped when core is halted (x=5 .. 7)
Bit 17
Bit 16 DBG_I2C2_SMBUS_TIMEOUT: SMBUS timeout mode stopped when Core is halted
Bit 15 DBG_I2C1_SMBUS_TIMEOUT: SMBUS timeout mode stopped when Core is halted
Bits 13:10 DBG_TIMx_STOP: TIMx counter stopped when core is halted (x=4..1)
Bit 9 DBG_WWDG_STOP: Debug window watchdog stopped when core is halted
Bit 8 DBG_IWDG_STOP: Debug independent watchdog stopped when core is halted
Bits 7:5 TRACE_MODE[1:0] and TRACE_IOEN: Trace pin assignment control
– With TRACE_IOEN=0:
– With TRACE_IOEN=1:
Bits 4:3 Reserved, must be kept at reset value.
690/709
0: The clock of the involved timer counter is fed even if the core is halted, and the outputs
behave normally.
1: The clock of the involved timer counter is stopped when the core is halted, and the
outputs are disabled (as if there were an emergency stop in response to a break event).
Reserved, must be kept at reset value.
0: Same behavior as in normal mode
1: The SMBUS timeout is frozen
0: Same behavior as in normal mode
1: The SMBUS timeout is frozen
0: The window watchdog counter clock continues even if the core is halted
1: The window watchdog counter clock is stopped when the core is halted
0: The watchdog counter clock continues even if the core is halted
1: The watchdog counter clock is stopped when the core is halted
TRACE_MODE=xx: TRACE pins not assigned (default state)
– TRACE_MODE=00: TRACE pin assignment for Asynchronous mode
– TRACE_MODE=01: TRACE pin assignment for Synchronous mode with a
TRACEDATA size of 1
– TRACE_MODE=10: TRACE pin assignment for Synchronous mode with a
TRACEDATA size of 2
– TRACE_MODE=11: TRACE pin assignment for Synchronous mode with a
TRACEDATA size of 4
RM0041 Rev 6
RM0041