Standby Mode - ST STM32F207 Series Reference Manual

Power control (PWR)
4.3.5

Standby mode

The Standby mode allows to achieve the lowest power consumption. It is based on the
®
Cortex -M3 deepsleep mode, with the voltage regulator disabled. The 1.2 V domain is
consequently powered off. The PLLs, the HSI oscillator and the HSE oscillator are also
switched off. SRAM and register contents are lost except for registers in the backup domain
(RTC registers, RTC backup register and backup SRAM), and Standby circuitry (see
Figure 3).
Entering Standby mode
The Standby mode is entered according to
SLEEPDEEP bit in the Cortex
Refer to
In Standby mode, the following features can be selected by programming individual control
bits:
•
Independent watchdog (IWDG): the IWDG is started by writing to its Key register or by
hardware option. Once started it cannot be stopped except by a reset. See
Section 17.3
•
Real-time clock (RTC): this is configured by the RTCEN bit in the backup domain
control register (RCC_BDCR)
•
Internal RC oscillator (LSI RC): this is configured by the LSION bit in the Control/status
register (RCC_CSR).
•
External 32.768 kHz oscillator (LSE OSC): this is configured by the LSEON bit in the
backup domain control register (RCC_BDCR)
Exiting Standby mode
The Standby mode is exited according to
flag in PWR_CR (see
indicates that the MCU was in Standby mode. All registers are reset after wakeup from
Standby except for PWR_CR.
The microcontroller exits Standby mode when an external Reset (NRST pin), an IWDG
Reset, a rising edge on WKUP pin, an RTC alarm, a tamper event, or a time stamp event is
detected. All registers are reset after wakeup from Standby except for
control/status register
After waking up from Standby mode, program execution restarts in the same way as after a
Reset (boot pins sampling, vector reset is fetched, etc.). The SBF status flag in the
power control/status register (PWR_CSR)
Refer to
76/1381
®
Table 11 for more details on how to enter Standby mode.
in Section 17: Independent watchdog
Section 4.4.2: PWR power control/status register
(PWR_CSR).
Table 11 for more details on how to exit Standby mode.
Section : Entering low-power
-M3 System Control register is set.
Section : Exiting low-power
indicates that the MCU was in Standby mode.
RM0033 Rev 9
mode, when the
(IWDG).
mode. The SBF status
(PWR_CSR))
PWR power
RM0033
PWR