ST STM32F100 Series Reference Manual page 644

Universal synchronous asynchronous receiver transmitter (USART)
Bit 6 DMAR: DMA enable receiver
Bit 5 SCEN: Smartcard mode enable
Bit 4 NACK: Smartcard NACK enable
Bit 3 HDSEL: Half-duplex selection
Bit 2 IRLP: IrDA low-power
Bit 1 IREN: IrDA mode enable
Bit 0 EIE: Error interrupt enable
644/709
This bit is set/reset by software
1: DMA mode is enabled for reception
0: DMA mode is disabled for reception
This bit is used for enabling Smartcard mode.
0: Smartcard mode disabled
1: Smartcard mode enabled
0: NACK transmission in case of parity error is disabled
1: NACK transmission during parity error is enabled
Selection of Single-wire Half-duplex mode
0: Half duplex mode is not selected
1: Half duplex mode is selected
This bit is used for selecting between normal and low-power IrDA modes
0: Normal mode
1: Low-power mode
This bit is set and cleared by software.
0: IrDA disabled
1: IrDA enabled
Error Interrupt Enable Bit is required to enable interrupt generation in case of a framing
error, overrun error or noise flag (FE=1 or ORE=1 or NF=1 in the USART_SR register) in
case of Multi Buffer Communication (DMAR=1 in the USART_CR3 register).
0: Interrupt is inhibited
1: An interrupt is generated whenever DMAR=1 in the USART_CR3 register and FE=1 or
ORE=1 or NF=1 in the USART_SR register.
RM0041 Rev 6
RM0041