RM0041
Offset Register
DAC_
0x1C
DHR8R2
DAC_
0x20
Reserved
DHR12RD
DAC_
0x24
DHR12LD
DAC_
0x28
DHR8RD
DAC_
0x2C
DOR1
DAC_
0x30
DOR2
0x34
DAC_SR
Refer to
Table 65. DAC register map (continued)
DACC2DHR[11:0]
DACC2DHR[11:0]
Reserved
Reserved
Reserved
Reserved
Section 2.3: Memory map
Reserved
Reserved
Reserved
for the register boundary addresses.
RM0041 Rev 6
Digital-to-analog converter (DAC)
DACC2DHR[7:0]
DACC1DHR[11:0]
DACC1DHR[11:0]
DACC2DHR[7:0]
DACC1DHR[7:0]
DACC1DOR[11:0]
DACC2DOR[11:0]
Reserved
Reserved
211/709
211
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