RM0041
RX line
Sample
clock (x8)
Framing error
A framing error is detected when:
The stop bit is not recognized on reception at the expected time, following either a de-
synchronization or excessive noise.
When the framing error is detected:
•
The FE bit is set by hardware
•
The invalid data is transferred from the Shift register to the USART_DR register.
•
No interrupt is generated in case of single byte communication. However this bit rises
at the same time as the RXNE bit which itself generates an interrupt. In case of
multibuffer communication an interrupt isissued if the EIE bit is set in the USART_CR3
register.
The FE bit is reset by a USART_SR register read operation followed by a USART_DR
register read operation.
Universal synchronous asynchronous receiver transmitter (USART)
Figure 249. Data sampling when oversampling by 8
1
2
Table 124. Noise detection from sampled data
Sampled value
000
001
010
011
100
101
110
111
sampled values
3
4
5
3/8
One bit time
NE status
0
1
1
1
1
1
1
0
RM0041 Rev 6
6
7
8
2/8
3/8
MSv31153V1
Received bit value
0
0
0
1
0
1
1
1
611/709
646
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