Figure 213. Mode D Read Accesses; Figure 214. Mode D Write Accesses - ST STM32F100 Series Reference Manual

RM0041 Flexible static memory controller (FSMC)
Mode D - asynchronous access with extended address

Figure 213. Mode D read accesses

Memory transaction
A[25:0]
NADV
NEx
NOE
NWE
High
data driven
D[15:0]
by memory
ADDSET DATAST
HCLK cycles HCLK cycles
ADDHLD
HCLK cycles
ai15566

Figure 214. Mode D write accesses

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