Analog-To-Digital Converter (Adc); Adc Introduction; Adc Main Features - ST STM32F100 Series Reference Manual

Analog-to-digital converter (ADC)

10 Analog-to-digital converter (ADC)
Low-density value line devices are STM32F100xx microcontrollers where the flash
memory density ranges between 16 and 32 Kbytes.
Medium-density value line devices are STM32F100xx microcontrollers where the flash
memory density ranges between 64 and 128 Kbytes.
High-density value line devices are STM32F100xx microcontrollers where the flash
memory density ranges between 256 and 512 Kbytes.
This section applies to the whole STM32F100xx family, unless otherwise specified.
10.1

ADC introduction

The 12-bit ADC is a successive approximation analog-to-digital converter. It has up to 18
multiplexed channels allowing it measure signals from sixteen external and two internal
sources. A/D conversion of the various channels can be performed in single, continuous,
scan or discontinuous mode. The result of the ADC is stored in a left-aligned or right-aligned
16-bit data register.
The analog watchdog feature allows the application to detect if the input voltage goes
outside the user-defined high or low thresholds.
The ADC input clock is generated from the PCLK2 clock divided by a prescaler, refer to
Figure 8: STM32F100xx clock tree (low and medium-density devices)
STM32F100xx clock tree (high-density
10.2

ADC main features

•
12-bit resolution
•
Interrupt generation at End of Conversion, End of Injected conversion and Analog
watchdog event
•
Single and continuous conversion modes
•
Scan mode for automatic conversion of channel 0 to channel 'n'
•
Self-calibration
•
Data alignment with in-built data coherency
•
Channel by channel programmable sampling time
•
External trigger option for both regular and injected conversion
•
Discontinuous mode
•
ADC conversion time:
–
•
ADC supply requirement: 2.4 V to 3.6 V
•
ADC input range: V
•
DMA request generation during regular channel conversion
The block diagram of the ADC is shown in
Note: V , if available (depending on package), must be tied to V
REF-
162/709
STM32F100xx value line devices: 1.17 µs at 24 MHz
≤ V
REF-
devices).
≤ V
IN REF+
Figure 24.
RM0041 Rev 6
and Figure 9:
.
SSA
RM0041