Rtc Counter Register (Rtc_Cnth / Rtc_Cntl) - ST STM32F100 Series Reference Manual

Real-time clock (RTC)
17.4.5

RTC counter register (RTC_CNTH / RTC_CNTL)

The RTC core has one 32-bit programmable counter, accessed through two 16-bit registers;
the count rate is based on the TR_CLK time reference, generated by the prescaler.
RTC_CNT registers keep the counting value of this counter. They are write-protected by bit
RTOFF in the RTC_CR register, and a write operation is allowed if the RTOFF value is '1'. A
write operation on the upper (RTC_CNTH) or lower (RTC_CNTL) registers directly loads the
corresponding programmable counter and reloads the RTC Prescaler. When reading, the
current value in the counter (system date) is returned.
RTC counter register high (RTC_CNTH)
Address offset: 0x18
Reset value: 0x0000
15 14 13
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Bits 15:0 RTC_CNT[31:16]: RTC counter high
RTC counter register low (RTC_CNTL)
Address offset: 0x1C
Reset value: 0x0000
15 14 13
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Bits 15:0 RTC_CNT[15:0]: RTC counter low
478/709
12 11 10 9
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Reading the RTC_CNTH register, the current value of the high part of the RTC Counter
register is returned. To write to this register it is necessary to enter configuration mode (see
Section 17.3.4: Configuring RTC
12 11 10 9
rw rw rw rw
Reading the RTC_CNTL register, the current value of the lower part of the RTC Counter
register is returned. To write to this register it is necessary to enter configuration mode (see
Section 17.3.4: Configuring RTC
8 7 6
RTC_CNT[31:16]
rw rw rw
registers).
8 7 6
RTC_CNT[15:0]
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registers).
RM0041 Rev 6
5 4 3 2
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5 4 3 2
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RM0041
1 0
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1 0
rw rw