10.11.15 Adc Register Map; Table 62. Adc Register Map And Reset Values - ST STM32F100 Series Reference Manual

Analog-to-digital converter (ADC)

10.11.15 ADC register map

The following table summarizes the ADC registers.
Offset Register
ADC_SR
0x00
Reset value
ADC_CR1
0x04
Reset value
ADC_CR2
0x08
Reset value
ADC_SMPR1
0x0C
Reset value 0
ADC_SMPR2
0x10
Reset value 0
ADC_JOFR1
0x14
Reset value
ADC_JOFR2
0x18
Reset value
ADC_JOFR3
0x1C
Reset value
ADC_JOFR4
0x20
Reset value
ADC_HTR
0x24
Reset value
ADC_LTR
0x28
Reset value
ADC_SQR1
0x2C
Reset value
188/709

Table 62. ADC register map and reset values

Reserved
0 0
Reserved
0 0
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
L[3:0]
Reserved
0 0
Reserved
DISC
NUM
Reserved
[2:0]
0 0
JEXTSE
EXTSEL
[2:0]
0 0 0 0 0 0 0
Sample time bits SMPx_x
0 0 0 0 0 0 0 0
Sample time bits SMPx_x
0 0 0 0 0 0 0 0
SQ16[4:0] 16th SQ15[4:0] 15th
conversion in
regular
sequence bits
0 0 0 0 0 0 0 0
RM0041 Rev 6
0 0 0 0 0 0 0 0
L
Reserved
[2:0]
0 0 0 0
0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0
JOFFSET1[11:0]
0 0 0 0 0 0
JOFFSET2[11:0]
0 0 0 0 0 0
JOFFSET3[11:0]
0 0 0 0 0 0
JOFFSET4[11:0]
0 0 0 0 0 0
HT[11:0]
0 0 0 0 0 0
LT[11:0]
0 0 0 0 0 0
SQ14[4:0] 14th
conversion in conversion in
regular regular
sequence bits sequence bits
0 0 0 0 0 0 0 0
RM0041
0 0 0 0 0
AWDCH[4:0]
0 0 0 0 0 0
0 0 0 0
0 0 0 0 0 0
0 0 0 0 0 0
0 0 0 0 0 0
0 0 0 0 0 0
0 0 0 0 0 0
0 0 0 0 0 0
0 0 0 0 0 0
0 0 0 0 0 0
SQ13[4:0] 13th
conversion in
regular
sequence bits
0 0 0 0 0 0