Guard Time And Prescaler Register (Usart_Gtpr) - ST STM32F100 Series Reference Manual

RM0041
23.6.7

Guard time and prescaler register (USART_GTPR)

Address offset: 0x18
Reset value: 0x0000 0000
31 30 29
15 14 13
rw rw rw
Bits 31:16 Reserved, must be kept at reset value
Bits 7:0 PSC[7:0]: Prescaler value
– In IrDA Low-power mode:
PSC[7:0] = IrDA Low-Power Baud Rate
Used for programming the prescaler for dividing the system clock to achieve the low-power
frequency:
The source clock is divided by the value given in the register (8 significant bits):
00000000: Reserved - do not program this value
00000001: divides the source clock by 1
00000010: divides the source clock by 2
...
– In normal IrDA mode: PSC must be set to 00000001.
– In smartcard mode:
PSC[4:0]: Prescaler value
Used for programming the prescaler for dividing the system clock to provide the smartcard
clock.
The value given in the register (5 significant bits) is multiplied by 2 to give the division factor
of the source clock frequency:
00000: Reserved - do not program this value
00001: divides the source clock by 2
00010: divides the source clock by 4
00011: divides the source clock by 6
...
Note: 1: Bits [7:5] have no effect if Smartcard mode is used.
Universal synchronous asynchronous receiver transmitter (USART)
28 27 26 25
12 11 10 9
GT[7:0]
rw rw rw rw
2: This bit is not available for UART4 & UART5.
24 23 22
Reserved
8 7 6
rw rw rw
RM0041 Rev 6
21 20 19 18
5 4 3 2
PSC[7:0]
rw rw rw rw
17 16
1 0
rw rw
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