Rtc Functional Description; Overview; Figure 196. Rtc Simplified Block Diagram - ST STM32F100 Series Reference Manual

RM0041
17.3

RTC functional description

17.3.1

Overview

The RTC consists of two main units (see
to interface with the APB1 bus. This unit also contains a set of 16-bit registers accessible
from the APB1 bus in read or write mode (for more information refer to
registers). The APB1 interface is clocked by the APB1 bus clock in order to interface with
the APB1 bus.
The other unit (RTC Core) consists of a chain of programmable counters made of two main
blocks. The first block is the RTC prescaler block, which generates the RTC time base
TR_CLK that can be programmed to have a period of up to 1 second. It includes a 20-bit
programmable divider (RTC Prescaler). Every TR_CLK period, the RTC generates an
interrupt (Second Interrupt) if it is enabled in the RTC_CR register. The second block is a
32-bit programmable counter that can be initialized to the current system time. The system
time is incremented at the TR_CLK rate and compared with a programmable date (stored in
the RTC_ALR register) in order to generate an alarm interrupt, if enabled in the RTC_CR
control register.
PCLK1
RTCCLK

Figure 196. RTC simplified block diagram

Backup domain
RTC_PRL
32-bit programmable
Reload
TR_CLK
RTC_DIV
rising
edge
RTC prescaler
powered in Standby
powered in Standby
WKUP pin
RM0041 Rev 6
Figure 196). The first one (APB1 Interface) is used
APB1 bus
APB1 interface
RTC_Second
counter
RTC_Overflow
RTC_CNT
RTC_Alarm
=
RTC_ALR
RTC_Alarm
WKP_STDBY
Real-time clock (RTC)
Section 17.4: RTC
not powered in Standby
RTC_CR
SECF
SECIE
OWF
OWIE
ALRF
ALRIE
not powered in Standby
NVIC interrupt
controller
not powered in Standby
exit
Standby mode
powered in Standby
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