ST STM32F100 Series Reference Manual page 455

RM0041
Table 83. TIM16&TIM17 register map and reset values (continued)
Offset Register
TIMx_RCR
0x30
Reset value
TIMx_CCR1
0x34
Reset value
TIMx_BDTR
0x44
Reset value
TIMx_DCR
0x48
Reset value
TIMx_DMAR
0x4C
Reset value
Refer to
Reserved
Reserved
Reserved
Reserved
Section 3.3: Memory map
General-purpose timers (TIM15/16/17)
Reserved
0 0
0 0
0 0
for the register boundary addresses.
RM0041 Rev 6
0 0
CCR1[15:0]
0 0 0 0 0 0 0 0
LOCK
[1:0]
0 0 0 0 0 0 0 0
DBL[4:0]
Reserve
d
0 0 0 0 0
DMAB[15:0]
0 0 0 0 0 0 0 0
REP[7:0]
0 0 0 0 0 0
0 0 0 0 0 0
DT[7:0]
0 0 0 0 0 0
DBA[4:0]
0 0 0 0 0
0 0 0 0 0 0
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