Serial Peripheral Interface (Spi); Spi Introduction - ST STM32F100 Series Reference Manual

Serial peripheral interface (SPI)

21 Serial peripheral interface (SPI)
Low-density value line devices are STM32F100xx microcontrollers where the flash
memory density ranges between 16 and 32 Kbytes.
Medium-density value line devices are STM32F100xx microcontrollers where the flash
memory density ranges between 64 and 128 Kbytes.
High-density value line devices are STM32F100xx microcontrollers where the flash
memory density ranges between 256 and 512 Kbytes.
21.1

SPI introduction

The serial peripheral interface (SPI) allows half/ full-duplex, synchronous, serial
communication with external devices. The interface can be configured as the master and in
this case it provides the communication clock (SCK) to the external slave device. The
interface is also capable of operating in multimaster configuration.
It may be used for a variety of purposes, including simplex synchronous transfers on two
lines with a possible bidirectional data line or reliable communication using CRC checking.
Warning:
536/709
Since some SPI1 and SPI3 pins may be mapped onto some
pins used by the JTAG interface (SPI1/3_NSS onto JTDI,
SPI1/3_SCK onto JTDO and SPI1/3_MISO onto NJTRST), you
may either:
– disable the JTAG and use the SWD interface prior to
configuring the pins listed as SPI IOs (when debugging the
application), or
– disable both JTAG/SWD interfaces (for standalone
applications).
For more information on the configuration of the JTAG/SWD
interface pins, refer to
function remapping.
RM0041 Rev 6
Section 7.3.3: JTAG/SWD alternate
RM0041