Analog-to-digital converter (ADC)
The total number of conversions in the injected group must be written in the L[1:0] bits
in the ADC_JSQR register.
If the ADC_SQRx or ADC_JSQR registers are modified during a conversion, the current
conversion is reset and a new start pulse is sent to the ADC to convert the newly chosen
group.
Temperature sensor, V
•
The temperature sensor is internally connected to ADC1_IN18 channel which is shared
with VBAT. Only one conversion, temperature sensor or VBAT, must be selected at a
time. When the temperature sensor and VBAT conversion are set simultaneously, only
the VBAT conversion is performed.
The internal reference voltage VREFINT is connected to ADC1_IN17.
The V
BAT
injected or regular channel.
13.3.4
Single conversion mode
In Single conversion mode the ADC does one conversion. This mode is started with the
CONT bit at 0 by either:
•
setting the SWSTART bit in the ADC_CR2 register (for a regular channel only)
•
setting the JSWSTART bit (for an injected channel)
•
external trigger (for a regular or injected channel)
Once the conversion of the selected channel is complete:
•
If a regular channel was converted:
–
–
–
•
If an injected channel was converted:
–
–
–
Then the ADC stops.
13.3.5
Continuous conversion mode
In continuous conversion mode, the ADC starts a new conversion as soon as it finishes one.
This mode is started with the CONT bit at 1 either by external trigger or by setting the
SWSTRT bit in the ADC_CR2 register (for regular channels only).
After each conversion:
•
If a regular group of channels was converted:
–
–
–
320/1163
REFINT
channel is connected to ADC1_IN18 channel. It can also be converted as an
The converted data are stored into the 16-bit ADC_DR register
The EOC (end of conversion) flag is set
An interrupt is generated if the EOCIE bit is set
The converted data are stored into the 16-bit ADC_JDR1 register
The JEOC (end of conversion injected) flag is set
An interrupt is generated if the JEOCIE bit is set
The last converted data are stored into the 16-bit ADC_DR register
The EOC (end of conversion) flag is set
An interrupt is generated if the EOCIE bit is set
and V
internal channels
BAT
RM0402 Rev 6
RM0402
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