RM0402
17.4.10
TIMx counter (TIMx_CNT)
Address offset: 0x24
Reset value: 0x0000
15
14
13
rw
rw
rw
Bits 15:0 CNT[15:0]: Counter value
17.4.11
TIMx prescaler (TIMx_PSC)
Address offset: 0x28
Reset value: 0x0000
15
14
13
rw
rw
rw
Bits 15:0 PSC[15:0]: Prescaler value
17.4.12
TIMx auto-reload register (TIMx_ARR)
Address offset: 0x2C
Reset value: 0x0000
15
14
13
rw
rw
rw
Bits 15:0
12
11
10
9
rw
rw
rw
rw
12
11
10
9
rw
rw
rw
rw
The counter clock frequency CK_CNT is equal to f
PSC contains the value to be loaded in the active prescaler register at each update event.
12
11
10
9
rw
rw
rw
rw
ARR[15:0]: Auto-reload value
ARR is the value to be loaded in the actual auto-reload register.
Refer to the
Section 17.3.1: Time-base unit on page 485
and behavior.
The counter is blocked while the auto-reload value is null.
General-purpose timers (TIM2 to TIM5)
8
7
6
CNT[15:0]
rw
rw
rw
8
7
6
PSC[15:0]
rw
rw
rw
CK_PSC
8
7
6
ARR[15:0]
rw
rw
rw
RM0402 Rev 6
5
4
3
2
rw
rw
rw
rw
5
4
3
2
rw
rw
rw
rw
/ (PSC[15:0] + 1).
5
4
3
2
rw
rw
rw
rw
for more details about ARR update
1
0
rw
rw
1
0
rw
rw
1
0
rw
rw
537/1163
544
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