Sdio Apb2 Interface - ST STM32F412 Reference Manual

Secure digital input/output interface (SDIO)
27.3.2

SDIO APB2 interface

The APB2 interface generates the interrupt and DMA requests, and accesses the SDIO
adapter registers and the data FIFO. It consists of a data path, register decoder, and
interrupt/DMA logic.
SDIO interrupts
The interrupt logic generates an interrupt request signal that is asserted when at least one
of the selected status flags is high. A mask register is provided to allow selection of the
conditions that will generate an interrupt. A status flag generates the interrupt request if a
corresponding mask flag is set.
SDIO/DMA interface
SDIO APB interface controls all subunit to perform transfers between the host and card
Example of read procedure using DMA
Send CMD17 (READ_BLOCK) as follows:
a)
b)
c)
d)
e)
f)
g)
h)
Note: When FIFO overrun error occurs with last 1-4 bytes, it may happens that RXOVERR flag is
set 2 APB clock cycles after DATAEND flag is set. To guarantee success of read operation
RXOVERR must be cheked after FIFO is empty.
878/1163
Program the SDIO data length register (SDIO data timer register should be
already programmed before the card identification process)
Program DMA channel (refer to
Program the SDIO data control register: DTEN with '1' (SDIO card host enabled to
send data); DTDIR with '1' (from card to controller); DTMODE with '0' (block data
transfer); DMAEN with '1' (DMA enabled); DBLOCKSIZE with 0x9 (512 bytes).
Other fields are don't care.
Program the SDIO argument register with the address location of the card from
where data is to be transferred
Program the SDIO command register: CmdIndex with 17(READ_BLOCK);
WaitResp with '1' (SDIO card host waits for a response); CPSMEN with '1' (SDIO
card host enabled to send a command). Other fields are at their reset value.
Wait for SDIO_STA[6] = CMDREND interrupt, (CMDREND is set if there is no
error on command path).
Wait for SDIO_STA[10] = DBCKEND, (DBCKEND is set in case of no errors until
the CRC check is passed)
Wait until the FIFO is empty, when FIFO is empty the SDIO_STA[5] = RXOVERR
value has to be check to guarantee that read succeeded
DMA configuration for SDIO
RM0402 Rev 6
RM0402
controller)