Flash Option Control Register (Flash_Optcr) - ST STM32F412 Reference Manual

Embedded Flash memory interface
Bits 9:8 PSIZE: Program size
Bit 7 Reserved, must be kept cleared.
Bits 6:3 SNB: Sector number
Bit 2 MER: Mass Erase
Bit 1 SER: Sector Erase
Bit 0 PG: Programming
3.8.6

Flash option control register (FLASH_OPTCR)

The FLASH_OPTCR register is used to modify the user option bytes.
Address offset: 0x14
Reset value: 0x0FFF FFED. The option bits are loaded with values from Flash memory at
reset release.
Access: no wait state when no Flash memory operation is ongoing, word, half-word and
byte access.
31 30 29
SPR
Res. Res.
MOD
rw
15 14 13
rw rw rw
78/1163
These bits select the program parallelism.
00 program x8
01 program x16
10 program x32
11 program x64
These bits select the sector to erase.
0000 sector 0
0001 sector 1
...
1010 sector 10
1011 sector 11
1100 user specific sector
1101 user configuration sector
1110 not allowed
1111 not allowed
Erase activated for all user sectors.
Sector Erase activated.
Flash programming activated.
28 27 26 25
Res.
rw rw rw
12 11 10 9
RDP[7:0]
rw rw rw rw
24 23 22 21
nWRP[11:0]
rw rw rw rw
8 7 6 5
nRST_ nRST_ WDG_
STDBY STOP
rw rw rw rw
RM0402 Rev 6
20 19 18
rw rw rw
4 3 2
Res. BOR_LEV
SW
rw rw
RM0402
17 16
rw rw
1 0
OPT OPT
STRT LOCK
rs rs