Sdio Interrupt Clear Register (Sdio_Icr) - ST STM32F412 Reference Manual

Secure digital input/output interface (SDIO)
Bit 20 TXDAVL: Data available in transmit FIFO
Bit 19 RXFIFOE: Receive FIFO empty
Bit 18 TXFIFOE: Transmit FIFO empty
Bit 17 RXFIFOF: Receive FIFO full
Bit 16 TXFIFOF: Transmit FIFO full
Bit 15 RXFIFOHF: Receive FIFO half full: there are at least 8 words in the FIFO
Bit 14 TXFIFOHE: Transmit FIFO half empty: at least 8 words can be written into the FIFO
Bit 13 RXACT: Data receive in progress
Bit 12 TXACT: Data transmit in progress
Bit 11 CMDACT: Command transfer in progress
Bit 10 DBCKEND: Data block sent/received (CRC check passed)
Bit 9 Reserved, must be kept at reset value.
Bit 8 DATAEND: Data end (data counter, SDIDCOUNT, is zero)
Bit 7 CMDSENT: Command sent (no response required)
Bit 6 CMDREND: Command response received (CRC check passed)
Bit 5 RXOVERR: Received FIFO overrun error
Note: If DMA is used to read SDIO FIFO (DMAEN bit is set in SDIO_DCTRL register), user
Bit 4 TXUNDERR: Transmit FIFO underrun error
Note: If DMA is used to fill SDIO FIFO (DMAEN bit is set in SDIO_DCTRL register), user
Bit 3 DTIMEOUT: Data timeout
Bit 2 CTIMEOUT: Command response timeout
Bit 1 DCRCFAIL: Data block sent/received (CRC check failed)
Bit 0 CCRCFAIL: Command response received (CRC check failed)
27.8.12

SDIO interrupt clear register (SDIO_ICR)

Address offset: 0x38
Reset value: 0x0000 0000
The SDIO_ICR register is a write-only register. Writing a bit with 1b clears the corresponding
bit in the SDIO_STA Status register.
914/1163
When HW Flow Control is enabled, TXFIFOE signals becomes activated when the FIFO
contains 2 words.
When HW Flow Control is enabled, RXFIFOF signals becomes activated 2 words before the
FIFO is full.
software should disable DMA stream, and then write with '0' (to disable DMA request
generation).
software should disable DMA stream, and then write DMAEN with '0' (to disable DMA
request generation).
The Command TimeOut period has a fixed value of 64 SDIO_CK clock periods.
RM0402 Rev 6
RM0402