Figure 276. Hardware/Software Slave Select Management - ST STM32F412 Reference Manual

Serial peripheral interface/ inter-IC sound (SPI/I2S)
–
–
NSS
pin
820/1163
NSS output enable (SSM=0,SSOE = 1): this configuration is only used when the
MCU is set as master. The NSS pin is managed by the hardware. The NSS signal
is driven low as soon as the SPI is enabled in master mode (SPE=1), and is kept
low until the SPI is disabled (SPE =0).
NSS output disable (SSM=0, SSOE = 0): if the microcontroller is acting as the
master on the bus, this configuration allows multimaster capability. If the NSS pin
is pulled low in this mode, the SPI enters master mode fault state and the device is
automatically reconfigured in slave mode. In slave mode, the NSS pin works as a
standard "chip select" input and the slave is selected while NSS line is at low level.

Figure 276. Hardware/software slave select management

GPIO
logic
NSS external logic
1
0
NSS
Output
Control
RM0402 Rev 6
SSI control bit
SSM control bit
NSS Master
Slave mode
Inp. mode
Vdd OK Non active
Vss Conflict
NSS Input
NSS Output
(used in Master mode & NSS
HW management only)
SSOE control bit
NSS internal logic
RM0402
Active
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