Syscfg External Interrupt Configuration Register 3; (Syscfg_Exticr3) - ST STM32F412 Reference Manual

System configuration controller (SYSCFG)
Bits 31:16 Reserved, must be kept at reset value.
Bits 15:0 EXTIx[3:0]: EXTI x configuration (x = 4 to 7)
8.2.5

SYSCFG external interrupt configuration register 3

(SYSCFG_EXTICR3)

Address offset: 0x10
Reset value: 0x0000 0000
31 30 29
Res. Res. Res. Res.
15 14 13
EXTI11[3:0]
rw rw rw
Bits 31:16 Reserved, must be kept at reset value.
Bits 15:0 EXTIx[3:0]: EXTI x configuration (x = 8 to 11)
190/1163
These bits are written by software to select the source input for the EXTIx
external interrupt.
0000: PA[x] pin
0001: PB[x] pin
0010: PC[x] pin
0011: PD[x] pin
0100: PE[x] pin
0101: PF[x] pin
0110: PG[x] pin
Other configurations: reserved
28 27 26 25
Res. Res. Res.
12 11 10 9
EXTI10[3:0]
rw rw rw rw
These bits are written by software to select the source input for the EXTIx external
interrupt.
0000: PA[x] pin
0001: PB[x] pin
0010: PC[x] pin
0011: PD[x] pin
0100: PE[x] pin
0101: PF[x] pin
0110: PG[x] pin
Other configurations: reserved
24 23 22
Res. Res. Res.
8 7 6
EXTI9[3:0]
rw rw rw
RM0402 Rev 6
21 20 19 18
Res. Res. Res. Res.
5 4 3 2
EXTI8[3:0]
rw rw rw rw
RM0402
17 16
Res. Res.
1 0
rw rw