Figure 198. Counter Timing Diagram, Internal Clock Divided By 2; Figure 199. Counter Timing Diagram, Internal Clock Divided By 4 - ST STM32F412 Reference Manual

Basic timers (TIM6/7)
Timerclock = CK_CNT
Counter register
Counter overflow
Update event (UEV)
Update interrupt flag
Timerclock = CK_CNT
Counter register
Counter overflow
Update event (UEV)
Update interrupt flag
596/1163

Figure 198. Counter timing diagram, internal clock divided by 2

CK_PSC
CNT_EN
0034
(UIF)

Figure 199. Counter timing diagram, internal clock divided by 4

CK_PSC
CNT_EN
0035
(UIF)
RM0402 Rev 6
0035 0036 0000
0036
RM0402
0001 0002 0003
MS31079V2
0000 0001
MS31080V2