Tim9/12 Register Map; Table 105. Tim9/12 Register Map And Reset Values - ST STM32F412 Reference Manual

RM0402
18.4.13

TIM9/12 register map

TIM9/12 registers are mapped as 16-bit addressable registers as described below:
Offset Register
TIMx_CR1
0x00
Reset value
TIMx_SMCR
0x08
Reset value
TIMx_DIER
0x0C
Reset value
TIMx_SR
0x10
Reset value
TIMx_EGR
0x14
Reset value
TIMx_CCMR1
Output Compare
mode
Reset value
0x18
TIMx_CCMR1
Input Capture
mode
Reset value
0x1C Reserved
TIMx_CCER
0x20
Reset value
TIMx_CNT
0x24
Reset value
TIMx_PSC
0x28
Reset value
TIMx_ARR
0x2C
Reset value
0x30 Reserved

Table 105. TIM9/12 register map and reset values

RM0402 Rev 6
General-purpose timers (TIM9 to TIM14)
CKD
[1:0]
0 0
0 0
OC2M CC2S
[2:0] [1:0]
0 0 0 0 0 0 0
IC2
CC2S
IC2F[3:0] PSC
[1:0]
[1:0]
0 0 0 0 0 0 0 0
CNT[15:0]
0 0 0 0 0 0 0 0
PSC[15:0]
0 0 0 0 0 0 0 0
ARR[15:0]
0 0 0 0 0 0 0 0
0 0 0 0 0
TS[2:0] SMS[2:0]
0 0 0 0
0 0 0 0
0 0 0 0
0 0 0 0
CC1
OC1M
S
[2:0]
[1:0]
0 0 0 0 0 0 0 0
IC1 CC1
IC1F[3:0] PSC S
[1:0] [1:0]
0 0 0 0 0 0 0 0
0 0 0 0 0 0
0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0
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