Direct memory access controller (DMA)
Bits 1:0 FTH[1:0]: FIFO threshold selection
226/1163
These bits are set and cleared by software.
00: 1/4 full FIFO
01: 1/2 full FIFO
10: 3/4 full FIFO
11: full FIFO
These bits are not used in the direct mode when the DMIS = 0.
These bits are protected and can be written only if EN = 0.
RM0402 Rev 6
RM0402
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