ST STM32F412 Reference Manual page 400

Advanced arm-based 32-bit mcus
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Digital filter for sigma delta modulators (DFSDM)
Table 91. DFSDM register map and reset values (continued)
Register
Offset
name
DFSDM_
FLT1AWLTR
0x1A4
reset value
0
DFSDM_
FLT1AWSR
0x1A8
reset value
DFSDM_
FLT1AWCFR
0x1AC
reset value
DFSDM_
FLT1EXMAX
0x1B0
reset value
1
DFSDM_
FLT1EXMIN
0x1B4
reset value
0
DFSDM_
FLT1CNVTIMR
0x1B8
reset value
0
0x1BC -
Reserved
0x2FC
Refer to
400/1163
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
Section 2.2 on page 49
AWLT[23:0]
0
0
0
0
0
0
0
0
0
EXMAX[23:0]
0
0
0
0
0
0
0
0
0
EXMIN[23:0]
1
1
1
1
1
1
1
1
1
CNVCNT[27:0]
0
0
0
0
0
0
0
0
0
for the register boundary addresses.
RM0402 Rev 6
0
0
0
0
0
0
AWHTF[3:0]
0
0
0
0
CLRAWHTF
[3:0]
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
RM0402
BKAWL[3:0]
0
0
0
0
AWLTF[3:0]
0
0
0
0
CLRAWLTF
[3:0]
0
0
0
0
0
0
0
0
0

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