ST STM32F412 Reference Manual page 228

Direct memory access controller (DMA)
Offset Register name
DMA_S1M0AR
0x034
Reset value 0
DMA_S1M1AR
0x038
Reset value 0
DMA_S1FCR
0x03C
Reset value
DMA_S2CR
0x040
Reset value
DMA_S2NDTR
0x044
Reset value
DMA_S2PAR
0x048
Reset value 0
DMA_S2M0AR
0x04C
Reset value 0
DMA_S2M1AR
0x050
Reset value 0
DMA_S2FCR
0x054
Reset value
DMA_S3CR
0x058
Reset value
DMA_S3NDTR
0x05C
Reset value
DMA_S3PAR
0x060
Reset value 0
DMA_S3M0AR
0x064
Reset value 0
DMA_S3M1AR
0x068
Reset value 0
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Table 39. DMA register map and reset values (continued)
0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0
0 0 0 0 0
0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0
0 0 0 0 0
0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0
M0A[31:0]
0 0 0 0 0 0 0 0 0
M1A[31:0]
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0
0 0
PA[31:0]
0 0 0 0 0 0 0 0 0
M0A[31:0]
0 0 0 0 0 0 0 0 0
M1A[31:0]
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0
0 0
PA[31:0]
0 0 0 0 0 0 0 0 0
M0A[31:0]
0 0 0 0 0 0 0 0 0
M1A[31:0]
0 0 0 0 0 0 0 0 0
RM0402 Rev 6
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
0 1
0 0 0 0 0 0 0 0 0
NDT[15:0]
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
0 1
0 0 0 0 0 0 0 0 0
NDT[15:0]
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
RM0402
0 0 0 0 0
0 0 0 0 0
FS[2:0]
0 0 0 0 1
0 0 0 0 0
0 0 0 0 0
0 0 0 0 0
0 0 0 0 0
0 0 0 0 0
FS[2:0]
0 0 0 0 1
0 0 0 0 0
0 0 0 0 0
0 0 0 0 0
0 0 0 0 0
0 0 0 0 0