Serial peripheral interface/ inter-IC sound (SPI/I2S)
Figure 291. MSB Justified 16-bit or 32-bit full-accuracy length with CPOL = 0
Data are latched on the falling edge of CK (for transmitter) and are read on the rising edge
(for the receiver).
CK
WS
SD
Figure 293. MSB justified 16-bit extended to 32-bit packet frame with CPOL = 0
CK
WS
SD
LSB justified standard
This standard is similar to the MSB justified standard (no difference for the 16-bit and 32-bit
full-accuracy frame formats).
840/1163
CK
Transmission
WS
Reception
16- or 32 bit data
SD
MSB
Figure 292. MSB justified 24-bit frame length with CPOL = 0
Transmission
24 bit data
LSB
MSB
Channel left 32-bit
Transmission
16-bit data
MSB
LSB
Channel left 32-bit
RM0402 Rev 6
LSB
MSB
Channel left
Reception
8-bit remaining
0 forced
Reception
16-bit remaining
0 forced
Channel right
Channel right
Channel right
RM0402
MS30100 V1
MS30101V1
MS30102V1
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