Table 36. Fifo Threshold Configurations - ST STM32F412 Reference Manual

Direct memory access controller (DMA)
FIFO threshold and burst configuration
Caution is required when choosing the FIFO threshold (bits FTH[1:0] of the DMA_SxFCR
register) and the size of the memory burst (MBURST[1:0] of the DMA_SxCR register): The
content pointed by the FIFO threshold must exactly match an integer number of memory
burst transfers. If this is not in the case, a FIFO error (flag FEIFx of the DMA_HISR or
DMA_LISR register) is generated when the stream is enabled, then the stream is
automatically disabled. The allowed and forbidden configurations are described in the table
below. The forbidden configurations are highlighted in gray in the table.
MSIZE
Byte
Half-word
Word
In all cases, the burst size multiplied by the data size must not exceed the FIFO size (data
size can be: 1 (byte), 2 (half-word) or 4 (word)).
Incomplete burst transfer at the end of a DMA transfer may happen if one of the following
conditions occurs:
• For the AHB peripheral port configuration: the total number of data items (set in the
DMA_SxNDTR register) is not a multiple of the burst size multiplied by the data size.
•
For the AHB memory port configuration: the number of remaining data items in the
FIFO to be transferred to the memory is not a multiple of the burst size multiplied by the
data size.
In such cases, the remaining data to be transferred is managed in single mode by the DMA,
even if a burst transaction is requested during the DMA stream configuration.
Note: When burst transfers are requested on the peripheral AHB port and the FIFO is used
(DMDIS = 1 in the DMA_SxCR register), it is mandatory to respect the following rule to
avoid permanent underrun or overrun conditions, depending on the DMA stream direction:
If (PBURST × PSIZE) = FIFO_SIZE (4 words), FIFO_Threshold = 3/4 is forbidden with
PSIZE = 1, 2 or 4 and PBURST = 4, 8 or 16.
This rule ensures that enough FIFO space at a time is free to serve the request from the
peripheral.
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Table 36. FIFO threshold configurations

FIFO level MBURST = INCR4
1/4 1 burst of 4 beats
1/2 2 bursts of 4 beats
3/4 3 bursts of 4 beats
Full 4 bursts of 4 beats
1/4 Forbidden
1/2 1 burst of 4 beats
3/4 Forbidden
Full 2 bursts of 4 beats
1/4
1/2 Forbidden
3/4
Full 1 burst of 4 beats
RM0402 Rev 6
MBURST = INCR8
Forbidden
1 burst of 8 beats
Forbidden
2 bursts of 8 beats
Forbidden
1 burst of 8 beats
Forbidden
RM0402
MBURST = INCR16
Forbidden
1 burst of 16 beats
Forbidden