Figure 229. Transfer Sequence Flowchart For Fmpi2C Master Receiver For N >255 Bytes - ST STM32F412 Reference Manual

RM0402
Figure 229. Transfer sequence flowchart for FMPI2C master receiver for N >255 bytes
Fast-mode Plus Inter-integrated circuit (FMPI2C) interface
Set FMPI2C_CR2.START
with slave addess
NBYTES ...
End
Master reception
Master initialization
NBYTES = 0xFF; N=N-255
RELOAD =1
Configure slave address
Set FMPI2C_CR2.START
FMPI2C_ISR.RXNE
= 1?
Yes
Read FMPI2C_RXDR
NBYTES
received?
Yes
Yes
FMPI2C_ISR.TC
= 1?
No
No
FMPI2C_ISR.TCR
= 1?
Yes
IF N< 256
NBYTES =N; N=0;RELOAD=0
AUTOEND=0 for RESTART; 1 for STOP
ELSE
NBYTES =0xFF;N=N-255
RELOAD=1
RM0402 Rev 6
No
No
MSv35972V1
687/1163
722