Adc Injected Sequence Register (Adc_Jsqr); Adc Injected Data Register X (Adc_Jdrx) (X= 1 - ST STM32F412 Reference Manual

RM0402

13.12.12 ADC injected sequence register (ADC_JSQR)

Address offset: 0x38
Reset value: 0x0000 0000
31 30 29
Res. Res. Res. Res.
15 14 13
JSQ4[0] JSQ3[4:0]
rw rw rw
Bits 31:22 Reserved, must be kept at reset value.
Bits 21:20 JL[1:0]: Injected sequence length
Bits 19:15 JSQ4[4:0]: 4th conversion in injected sequence (when JL[1:0]=3, see note below)
Bits 14:10 JSQ3[4:0]: 3rd conversion in injected sequence (when JL[1:0]=3, see note below)
Bits 9:5 JSQ2[4:0]: 2nd conversion in injected sequence (when JL[1:0]=3, see note below)
Bits 4:0 JSQ1[4:0]: 1st conversion in injected sequence (when JL[1:0]=3, see note below)
Note: When JL[1:0]=3 (4 injected conversions in the sequencer), the ADC converts the channels
in the following order: JSQ1[4:0], JSQ2[4:0], JSQ3[4:0], and JSQ4[4:0].
When JL=2 (3 injected conversions in the sequencer), the ADC converts the channels in the
following order: JSQ2[4:0], JSQ3[4:0], and JSQ4[4:0].
When JL=1 (2 injected conversions in the sequencer), the ADC converts the channels in
starting from JSQ3[4:0], and then JSQ4[4:0].
When JL=0 (1 injected conversion in the sequencer), the ADC converts only JSQ4[4:0]
channel.

13.12.13 ADC injected data register x (ADC_JDRx) (x= 1..4)

Address offset: 0x3C - 0x48
Reset value: 0x0000 0000
31 30 29 28
Res. Res. Res. Res.
15 14 13 12
r r r
28 27 26 25
Res. Res. Res.
12 11 10 9
rw rw rw rw
These bits are written by software to define the total number of conversions in the injected
channel conversion sequence.
00: 1 conversion
01: 2 conversions
10: 3 conversions
11: 4 conversions
These bits are written by software with the channel number (0..18) assigned as the 4th in the
sequence to be converted.
27 26 25
Res. Res. Res.
11 10 9
r r r r
24 23 22
Res. Res. Res.
8 7 6
JSQ2[4:0]
rw rw rw
24 23 22
Res. Res. Res. Res.
8 7 6
JDATA[15:0]
r r r
RM0402 Rev 6
Analog-to-digital converter (ADC)
21 20 19 18
JL[1:0] JSQ4[4:1]
rw rw rw rw
5 4 3 2
JSQ1[4:0]
rw rw rw rw
21 20 19 18
Res. Res. Res.
5 4 3 2
r r r r
17 16
rw rw
1 0
rw rw
17 16
Res. Res.
1 0
r r
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