Gpio Registers; Gpio Port Mode Register (Gpiox_Moder) (X = A; Gpio Port Output Type Register (Gpiox_Otyper); (X = A - ST STM32F412 Reference Manual

RM0402
7.4

GPIO registers

This section gives a detailed description of the GPIO registers.
For a summary of register bits, register address offsets and reset values, refer to
The GPIO registers can be accessed by byte (8 bits), half-words (16 bits) or words (32 bits).
7.4.1 GPIO port mode register (GPIOx_MODER) (x = A...H)
Address offset: 0x00
Reset values:
•
0x0A800 0000 for port A
•
0x0000 0280 for port B
•
0x0000 0000 for other ports
31 30 29 28
MODER15[1:0] MODER14[1:0]
rw rw rw rw
15 14 13 12
MODER7[1:0] MODER6[1:0]
rw rw rw rw
Bits 2y:2y+1 MODERy[1:0]: Port x configuration bits (y = 0..15)
7.4.2

GPIO port output type register (GPIOx_OTYPER)

(x = A...H)
Address offset: 0x04
Reset value: 0x0000 0000
31 30 29 28
Res. Res. Res. Res.
15 14 13 12
OT15 OT14 OT13 OT12
rw rw rw rw
Bits 31:16 Reserved, must be kept at reset value.
Bits 15:0 OTy: Port x configuration bits (y = 0..15)
27 26 25
MODER13[1:0] MODER12[1:0]
rw rw rw
11 10 9
MODER5[1:0] MODER4[1:0]
rw rw rw
These bits are written by software to configure the I/O direction mode.
00: Input (reset state)
01: General purpose output mode
10: Alternate function mode
11: Analog mode
27 26 25
Res. Res. Res.
11 10 9
OT11 OT10 OT9
rw rw rw
These bits are written by software to configure the output type of the I/O port.
0: Output push-pull (reset state)
1: Output open-drain
24 23 22
MODER11[1:0] MODER10[1:0]
rw rw rw
8 7 6
MODER3[1:0] MODER2[1:0]
rw rw rw
24 23 22
Res. Res. Res. Res.
8 7 6
OT8 OT7 OT6 OT5
rw rw rw
RM0402 Rev 6
General-purpose I/Os (GPIO)
21 20 19 18
MODER9[1:0]
rw rw rw rw
5 4 3 2
MODER1[1:0]
rw rw rw rw
21 20 19 18
Res. Res. Res.
5 4 3 2
OT4 OT3 OT2
rw rw rw rw
Table 28.
17 16
MODER8[1:0]
rw rw
1 0
MODER0[1:0]
rw rw
17 16
Res. Res.
1 0
OT1 OT0
rw rw
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