Embedded bootloader
The embedded bootloader mode is used to reprogram the Flash memory using one of the
interface described in the table below. The availability of the interface is package
dependent.
USART1
Package
PA9/
PA10
UFQFPN48
Y
WLCSP64
Y
LQFP64
Y
LQFP100
Y
LQFP144
Y
UFBGA100
Y
UFBGA144
Y
The USART peripherals operate at the internal 16 MHz oscillator (HSI) frequency, while the
CAN and USB OTG FS require an external clock (HSE) multiple of 1 MHz (ranging from 4 to
26 MHz).
The embedded bootloader code is located in system memory. It is programmed by ST
during production. For additional information, refer to application note AN2606.
Physical remap in STM32F412xx
Once the boot pins are selected, the application software can modify the memory
accessible in the code area (in this way the code can be executed through the ICode bus in
place of the System bus). This modification is performed by programming the
SYSCFG memory remap register (SYSCFG_MEMRMP)
The following memories can thus be remapped:
•
Main Flash memory
•
System memory
•
Embedded SRAM
Table 4. Memory mapping vs. Boot mode/physical remap in STM32F412xx
0x2000 0000 - 0x2003 FFFF
0x1FFF 0000 - 0x1FFF 77FF
0x0802 0000 - 0x1FFE FFFF
0x0800 0000 - 0x080F FFFF
56/1163
Table 3. Embedded bootloader interfaces
USART2
USART3
I2C1
PD6/
PB11/
PB6/
PD5
PB10
PB7
-
-
Y
-
-
Y
-
-
Y
Y
-
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Addresses
I2C
I2C2
I2C3
FMP1
PF0/
PA8/
PB14/
PF1
PB4
PB15
-
Y
Y
-
Y
Y
-
Y
Y
-
Y
Y
Y
Y
Y
-
Y
Y
Y
Y
Y
Boot/Remap in main
Flash memory
SRAM (256 KB)
System memory
Reserved
Flash memory
RM0402 Rev 6
SPI3
SPI1
SPI4
PA4/
PE11/
PA15/
PA5/
PE12/
PC10/
PA6/
PE13/
PC11/
PA7
PE14
PC12
Y
-
-
Y
Y
-
Y
Y
-
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
in the SYSCFG controller.
Boot/Remap in
Boot/Remap in
embedded SRAM
System memory
SRAM (256KB)
SRAM (256KB)
System memory
System memory
Reserved
Flash memory
Flash memory
RM0402
CAN2
USB
PB5/
PA11
PB13
/P12
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Section 7.2.1:
Reserved
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