ST STM32F412 Reference Manual page 186

General-purpose I/Os (GPIO)
Offset Register
GPIOx_LCKR
(where x = A...H)
0x1C
Reset value
GPIOx_AFRL
(where x = A...H)
0x20
Reset value
GPIOx_AFRH
AFRH15[3:0] AFRH14[3:0] AFRH13[3:0] AFRH12[3:0] AFRH11[3:0] AFRH10[3:0]
(where x = A...H)
0x24
Reset value
Refer to
186/1163
Table 28. GPIO register map and reset values (continued)
AFRL7[3:0] AFRL6[3:0]
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
Section 2.2 on page 49
0 0
AFRL5[3:0] AFRL4[3:0] AFRL3[3:0]
0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0
for the register boundary addresses.
RM0402 Rev 6
0 0 0 0 0 0 0 0 0
AFRL2[3:0] AFRL1[3:0]
0 0 0 0 0 0 0 0 0
AFRH9[3:0]
0 0 0 0 0 0 0 0 0
RM0402
0 0 0 0 0 0
AFRL0[3:0]
0 0 0 0 0 0
AFRH8[3:0]
0 0 0 0 0 0