Dma Register Map; Table 39. Dma Register Map And Reset Values - ST STM32F412 Reference Manual

RM0402
9.5.11

DMA register map

Offset Register name
DMA_LISR
0x000
Reset value
DMA_HISR
0x004
Reset value
DMA_LIFCR
0x008
Reset value
DMA_HIFCR
0x00C
Reset value
DMA_S0CR
0x010
Reset value
DMA_S0NDTR
0x014
Reset value
DMA_S0PAR
0x018
Reset value 0
DMA_S0M0AR
0x01C
Reset value 0
DMA_S0M1AR
0x020
Reset value 0
DMA_S0FCR
0x024
Reset value
DMA_S1CR
0x008
Reset value
DMA_S1NDTR
0x02C
Reset value
DMA_S1PAR
0x030
Reset value 0

Table 39. DMA register map and reset values

0 0 0 0 0
0 0 0 0 0
0 0 0 0 0
0 0 0 0 0
0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
Direct memory access controller (DMA)
0 0 0 0 0
0 0 0 0 0
0 0 0 0 0
0 0 0 0 0
0 0 0 0 0 0 0
0 0
PA[31:0]
0 0 0 0 0 0 0 0
M0A[31:0]
0 0 0 0 0 0 0 0
M1A[31:0]
0 0 0 0 0 0 0 0
-
0 0 0 0 0 0 0
0 0
PA[31:0]
0 0 0 0 0 0 0 0
RM0402 Rev 6
0 0 0 0 0 0
0 0 0 0 0 0
0 0 0 0 0 0
0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
NDT[15:0]
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
0 1
0 0 0 0 0 0 0 0 0
NDT[15:0]
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
0 0 0 0
0 0 0 0
0 0 0 0
0 0 0 0
0 0 0 0 0
0 0 0 0 0
0 0 0 0 0
0 0 0 0 0
0 0 0 0 0
FS[2:0]
0 0 0 0 1
0 0 0 0 0
0 0 0 0 0
0 0 0 0 0
227/1163
230