Adc Regular Sequence Register 2 (Adc_Sqr2) - ST STM32F412 Reference Manual

RM0402
Bits 31:24 Reserved, must be kept at reset value.
Bits 23:20 L[3:0]: Regular channel sequence length
Bits 19:15 SQ16[4:0]: 16th conversion in regular sequence
Bits 14:10 SQ15[4:0]: 15th conversion in regular sequence
Bits 9:5 SQ14[4:0]: 14th conversion in regular sequence
Bits 4:0 SQ13[4:0]: 13th conversion in regular sequence

13.12.10 ADC regular sequence register 2 (ADC_SQR2)

Address offset: 0x30
Reset value: 0x0000 0000
31 30 29
Res. Res.
rw
15 14 13
SQ10_0 SQ9[4:0]
rw rw rw
Bits 31:30 Reserved, must be kept at reset value.
Bits 29:26 SQ12[4:0]: 12th conversion in regular sequence
Bits 24:20 SQ11[4:0]: 11th conversion in regular sequence
Bits 19:15 SQ10[4:0]: 10th conversion in regular sequence
Bits 14:10 SQ9[4:0]: 9th conversion in regular sequence
Bits 9:5 SQ8[4:0]: 8th conversion in regular sequence
Bits 4:0 SQ7[4:0]: 7th conversion in regular sequence
These bits are written by software to define the total number of conversions in the regular
channel conversion sequence.
0000: 1 conversion
0001: 2 conversions
...
1111: 16 conversions
These bits are written by software with the channel number (0..18) assigned as the 16th in
the conversion sequence.
28 27 26 25
SQ12[4:0]
rw rw rw rw
12 11 10 9
rw rw rw rw
These bits are written by software with the channel number
the sequence to be converted.
24 23 22
SQ11[4:0]
rw rw rw
8 7 6
SQ8[4:0]
rw rw rw
RM0402 Rev 6
Analog-to-digital converter (ADC)
21 20 19 18
SQ10[4:1]
rw rw rw rw
5 4 3 2
SQ7[4:0]
rw rw rw rw
(0..18) assigned as the 12th in
17 16
rw rw
1 0
rw rw
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