Fast-mode Plus Inter-integrated circuit (FMPI2C) interface
FMPI2C_PECR register is automatically transmitted if the master requests an extra byte
after the NBYTES-1 data transfer.
Caution:
The PECBYTE bit has no effect when the RELOAD bit is set.
Figure 232. Transfer sequence flowchart for SMBus slave transmitter N bytes + PEC
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SMBus slave
transmission
Slave initialization
No
FMPI2C_ISR.ADDR
= 1?
Yes
Read ADDCODE and DIR in FMPI2C_ISR
FMPI2C_CR2.NBYTES = N + 1
PECBYTE=1
Set FMPI2C_ICR.ADDRCF
FMPI2C_ISR.TXIS
=1?
Yes
Write FMPI2C_TXDR.TXDATA
RM0402 Rev 6
SCL
stretched
No
RM0402
MSv35973V1
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