Table 59. Fsmc_Btrx Bitfields (Mode C); Table 60. Fsmc_Bwtrx Bitfields (Mode C) - ST STM32F412 Reference Manual

RM0402
Bit number
3:2
1
0
Bit number
31:30
29:28
27:24
23:20
19:16
15:8
7:4
3:0
Bit number
31:30
29:28
27:24
23:20
19:16
15:8
7:4
3:0
Table 58. FSMC_BCRx bitfields (mode C) (continued)
Bit name
MTYP 0x02 (NOR Flash memory)
MUXEN 0x0
MBKEN 0x1

Table 59. FSMC_BTRx bitfields (mode C)

Bit name
Reserved 0x0
ACCMOD 0x2
DATLAT 0x0
CLKDIV 0x0
BUSTURN Time between NEx high to NEx low (BUSTURN HCLK).
Duration of the second access phase (DATAST HCLK cycles) for
DATAST
read accesses.
ADDHLD Don't care
Duration of the first access phase (ADDSET HCLK cycles) for read
ADDSET
accesses. Minimum value for ADDSET is 0.

Table 60. FSMC_BWTRx bitfields (mode C)

Bit name
Reserved 0x0
ACCMOD 0x2
DATLAT Don't care
CLKDIV Don't care
BUSTURN Time between NEx high to NEx low (BUSTURN HCLK).
Duration of the second access phase (DATAST HCLK cycles) for
DATAST
write accesses.
ADDHLD Don't care
Duration of the first access phase (ADDSET HCLK cycles) for write
ADDSET
accesses. Minimum value for ADDSET is 0.
RM0402 Rev 6
Flexible static memory controller (FSMC)
Value to set
Value to set
Value to set
265/1163
287