Adc Regular Sequence Register 3 (Adc_Sqr3) - ST STM32F412 Reference Manual

Analog-to-digital converter (ADC)

13.12.11 ADC regular sequence register 3 (ADC_SQR3)

Address offset: 0x34
Reset value: 0x0000 0000
31 30 29 28
Res. Res.
rw rw
15 14 13 12
SQ4_0 SQ3[4:0]
rw rw rw rw
Bits 31:30 Reserved, must be kept at reset value.
Bits 29:25 SQ6[4:0]: 6th conversion in regular sequence
Bits 24:20 SQ5[4:0]: 5th conversion in regular sequence
Bits 19:15 SQ4[4:0]: 4th conversion in regular sequence
Bits 14:10 SQ3[4:0]: 3rd conversion in regular sequence
Bits 9:5 SQ2[4:0]: 2nd conversion in regular sequence
Bits 4:0 SQ1[4:0]: 1st conversion in regular sequence
342/1163
27 26 25
SQ6[4:0]
rw rw rw
11 10 9
rw rw rw
These bits are written by software with the channel number (0..18) assigned as the 6th in the
sequence to be converted.
24 23 22
SQ5[4:0]
rw rw rw
8 7 6
SQ2[4:0]
rw rw rw
RM0402 Rev 6
21 20 19 18
SQ4[4:1]
rw rw rw rw
5 4 3 2
SQ1[4:0]
rw rw rw rw
RM0402
17 16
rw rw
1 0
rw rw