Figure 327. Example Of Filter Numbering - ST STM32F412 Reference Manual

Advanced arm-based 32-bit mcus
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RM0402
The index value of the filter number does not take into account the activation state of the
filter banks. In addition, two independent numbering schemes are used, one for each FIFO.
Refer to
Filter
Bank
ID=Identifier
Filter priority rules
Depending on the filter combination it may occur that an identifier passes successfully
through several filters. In this case the filter match value stored in the receive mailbox is
chosen according to the following priority rules:
A 32-bit filter takes priority over a 16-bit filter.
For filters of equal scale, priority is given to the
Mask mode
For filters of equal scale and mode, priority is given by the filter number (the lower the
number, the higher the priority).
Figure 327
for an example.

Figure 327. Example of filter numbering

FIFO0
0
ID List (32-bit)
1
ID Mask (32-bit)
3
ID List (16-bit)
Deactivated
5
ID List (32-bit)
6
ID Mask (16-bit)
9
ID List (32-bit)
13
ID Mask (32-bit)
Filter
Filter
Num.
Bank
0
2
1
2
4
3
4
7
5
6
7
8
8
9
10
10
11
11
12
13
12
Identifier
RM0402 Rev 6
Controller area network (bxCAN)
Filter
FIFO1
Num.
0
ID Mask (16-bit)
1
2
ID List (32-bit)
3
4
Deactivated
ID Mask (16-bit)
5
6
ID Mask (16-bit)
7
8
Deactivated
9
10
ID List (16-bit)
11
12
ID List (32-bit)
13
14
ID Mask (32-bit)
List mode over the
MS30399V2
Identifier
935/1163
966

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