Sdio Argument Register (Sdio_Arg); Sdio Command Register (Sdio_Cmd) - ST STM32F412 Reference Manual

RM0402
27.8.3

SDIO argument register (SDIO_ARG)

Address offset: 0x08
Reset value: 0x0000 0000
The SDIO_ARG register contains a 32-bit command argument, which is sent to a card as
part of a command message.
31 30 29
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15 14 13
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Bits 31:0 CMDARG: Command argument
Command argument sent to a card as part of a command message. If a command contains
an argument, it must be loaded into this register before writing a command to the command
register.
27.8.4

SDIO command register (SDIO_CMD)

Address offset: 0x0C
Reset value: 0x0000 0000
The SDIO_CMD register contains the command index and command type bits. The
command index is sent to a card as part of a command message. The command type bits
control the command path state machine (CPSM).
31 30 29
Res. Res. Res.
15 14 13
Res. Res. Res.
Bits 31:12 Reserved, must be kept at reset value.
Bit 11 SDIOSuspend: SD I/O suspend command
Bit 10 CPSMEN: Command path state machine (CPSM) Enable bit
Bit 9 WAITPEND: CPSM Waits for ends of data transfer (CmdPend internal signal).
28 27 26 25
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12 11 10 9
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28 27 26
Res. Res. Res. Res.
12 11 10
SDIO CPSM WAIT
Res.
Suspend EN PEND
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If this bit is set, the command to be sent is a suspend command (to be used only with SDIO
card).
If this bit is set, the CPSM is enabled.
If this bit is set, the CPSM waits for the end of data transfer before it starts sending a
command. This feature is available only with Stream data transfer mode
SDIO_DCTRL[2] = 1.
Secure digital input/output interface (SDIO)
24 23 22
CMDARG[31:16]
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8 7 6
CMDARG[15:0]
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25 24 23 22
Res. Res. Res.
9 8 7 6
WAIT
WAITRESP
INT
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RM0402 Rev 6
21 20 19 18
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5 4 3 2
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21 20 19 18
Res. Res. Res. Res.
5 4 3 2
CMDINDEX
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17 16
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1 0
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17 16
Res. Res.
1 0
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