Dfsdm Register Map; Table 91. Dfsdm Register Map And Reset Values - ST STM32F412 Reference Manual

Digital filter for sigma delta modulators (DFSDM)
14.8.16

DFSDM register map

The following table summarizes the DFSDM registers.
Register
Offset
name
DFSDM_
CH0CFGR1
0x00
reset value 0
DFSDM_
CH0CFGR2
0x04
reset value
DFSDM_
CH0AWSCDR
0x08
reset value
DFSDM_
CH0WDATR
0x0C
reset value
DFSDM_
CH0DATINR
0x10
reset value 0
0x14 -
Reserved
0x1C
DFSDM_
CH1CFGR1
0x20
reset value
DFSDM_
CH1CFGR2
0x24
reset value 0
DFSDM_
CH1AWSCDR
0x28
reset value
DFSDM_
CH1WDATR
0x2C
reset value
DFSDM_
CH1DATINR
0x30
reset value 0
0x34 -
Reserved
0x3C
396/1163

Table 91. DFSDM register map and reset values

0 0 0
0 0
INDAT1[15:0]
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
0 0
INDAT1[15:0]
0 0 0 0 0 0 0 0 0
CKOUTDIV[7:0]
0 0 0 0 0 0 0 0
OFFSET[23:0]
0
AWFOSR[4:0] BKSCD[3:0]
0 0 0 0 0 0 0
0 0
0 0 0 0 0 0 0 0
0 0
OFFSET[23:0]
0 0 0 0 0 0 0 0
AWFOSR[4:0] BKSCD[3:0]
0 0 0 0 0 0 0
0 0 0
0 0 0 0 0 0 0 0
RM0402 Rev 6
0 0 0 0 0 0
DTRBS[4:0]
0
0 0 0 0 0
WDATA[15:0]
0 0 0 0 0 0 0 0 0
INDAT0[15:0]
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0
DTRBS[4:0]
0 0 0 0 0 0 0 0 0
0 0 0 0 0
WDATA[15:0]
0 0 0 0 0 0 0 0 0
INDAT0[15:0]
0 0 0 0 0 0 0 0 0
RM0402
0 0 0 0
SCDT[7:0]
0 0 0 0 0
0 0 0 0 0
0 0 0 0 0
0 0 0 0
0 0
SCDT[7:0]
0 0 0 0 0
0 0 0 0 0
0 0 0 0 0