Tim6/7 Register Map; Table 108. Tim6/7 Register Map And Reset Values - ST STM32F412 Reference Manual

Advanced arm-based 32-bit mcus
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Basic timers (TIM6/7)
19.4.9

TIM6/7 register map

TIMx registers are mapped as 16-bit addressable registers as described in the table below:
Offset
Register
TIMx_CR1
0x00
Reset value
TIMx_CR2
0x04
Reset value
0x08
TIMx_DIER
0x0C
Reset value
TIMx_SR
0x10
Reset value
TIMx_EGR
0x14
Reset value
0x18
0x1C
0x20
TIMx_CNT
0x24
Reset value
TIMx_PSC
0x28
Reset value
TIMx_ARR
0x2C
Reset value
Refer to
604/1163

Table 108. TIM6/7 register map and reset values

0
0
0
0
1
1
Section 2.2 on page 49
Res.
Res.
Res.
Res.
CNT[15:0]
0
0
0
0
0
PSC[15:0]
0
0
0
0
0
ARR[15:0]
1
1
1
1
1
for the register boundary addresses.
RM0402 Rev 6
0
MMS[2:0]
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
RM0402
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1

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