Exti Block Diagram; Wakeup Event Management; Figure 29. External Interrupt/Event Controller Block Diagram - ST STM32F412 Reference Manual

Interrupts and events
10.2.2

EXTI block diagram

Figure 29
PCLK2
To NVIC interrupt
controller
23
10.2.3

Wakeup event management

The STM32F4xx are able to handle external or internal events in order to wake up the core
(WFE). The wakeup event can be generated either by:
•
enabling an interrupt in the peripheral control register but not in the NVIC, and enabling
the SEVONPEND bit in the Cortex
MCU resumes from WFE, the peripheral interrupt pending bit and the peripheral NVIC
IRQ channel pending bit (in the NVIC interrupt clear pending register) have to be
cleared.
•
or configuring an external or internal EXTI line in event mode. When the CPU resumes
from WFE, it is not necessary to clear the peripheral interrupt pending bit or the NVIC
IRQ channel pending bit as the pending bit corresponding to the event line is not set.
To use an external line as a wakeup event, refer to
236/1163
shows the block diagram.

Figure 29. External interrupt/event controller block diagram

23
Pending
request
register
Pulse
23 generator
23
AMBA APB bus
Peripheral interface
23
23
Software
Interrupt
interrupt
mask
event
register
register
23
23
23
Event
mask
register
®
-M4 with FPU System Control register. When the
Section 10.2.4: Functional
RM0402 Rev 6
23 23
Rising Falling
trigger trigger
selection selection
register register
23
23
Edge detect
circuit
description.
RM0402
Input
line
MS32662V1