Figure 169. Triggering Timer 2 With Enable Of Timer 1 - ST STM32F412 Reference Manual

Advanced arm-based 32-bit mcus
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General-purpose timers (TIM2 to TIM5)
TIMER1-CEN=CNT_EN
Using one timer as prescaler for another timer
For example, Timer 1 can be configured to act as a prescaler for Timer 2. Refer to
Figure 165
Configure Timer 1 master mode to send its Update Event (UEV) as trigger output
(MMS=010 in the TIM1_CR2 register). then it outputs a periodic signal on each counter
overflow.
Configure the Timer 1 period (TIM1_ARR registers).
Configure Timer 2 to get the input trigger from Timer 1 (TS=000 in the TIM2_SMCR
register).
Configure Timer 2 in external clock mode 1 (SMS=111 in TIM2_SMCR register).
Start Timer 2 by writing '1 in the CEN bit (TIM2_CR1 register).
Start Timer 1 by writing '1 in the CEN bit (TIM1_CR1 register).
Starting 2 timers synchronously in response to an external trigger
In this example, we set the enable of timer 1 when its TI1 input rises, and the enable of
Timer 2 with the enable of Timer 1. Refer to
520/1163

Figure 169. Triggering timer 2 with Enable of timer 1

CK_INT
TIMER1-CNT_INIT
TIMER1-CNT
TIMER2-CNT
TIMER2-CNT_INIT
TIMER2-write CNT
TIMER2-TIF
for connections. To do this:
75
00
CD
00
Figure 165
RM0402 Rev 6
01
E9
E7
E8
Write TIF = 0
for connections. To ensure the
RM0402
02
EA
MS37391V1

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