I 2 C Own Address Register 1 (I2C_Oar1); I 2 C Own Address Register 2 (I2C_Oar2) - ST STM32F412 Reference Manual

Inter-integrated circuit (I
2
24.6.3 I C own address register 1 (I2C_OAR1)
Address offset: 0x08
Reset value: 0x0000
15 14 13
ADD
Res. Res. Res.
MODE
rw
Bit 15 ADDMODE Addressing mode (slave mode)
0: 7-bit slave address (10-bit address not acknowledged)
1: 10-bit slave address (7-bit address not acknowledged)
Bit 14 Should always be kept at 1 by software.
Bits 13:10 Reserved, must be kept at reset value
Bits 9:8 ADD[9:8]: Interface address
7-bit addressing mode: don't care
10-bit addressing mode: bits9:8 of address
Bits 7:1 ADD[7:1]: Interface address
bits 7:1 of address
Bit 0 ADD0: Interface address
7-bit addressing mode: don't care
10-bit addressing mode: bit 0 of address
2
24.6.4 I C own address register 2 (I2C_OAR2)
Address offset: 0x0C
Reset value: 0x0000
15 14 13
Res. Res. Res. Res.
Bits 15:8 Reserved, must be kept at reset value
Bits 7:1 ADD2[7:1]: Interface address
bits 7:1 of address in dual addressing mode
Bit 0 ENDUAL: Dual addressing mode enable
0: Only OAR1 is recognized in 7-bit addressing mode
1: Both OAR1 and OAR2 are recognized in 7-bit addressing mode
748/1163
2
C) interface
12 11 10 9
Res. Res. ADD[9:8]
rw
12 11 10 9
Res. Res. Res.
8 7 6
rw rw rw
8 7 6
Res.
rw rw
RM0402 Rev 6
5 4 3 2
ADD[7:1]
rw rw rw rw
5 4 3 2
ADD2[7:1]
rw rw rw rw
RM0402
1 0
ADD0
rw rw
1 0
EN
DUAL
rw rw