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3.5
Pin Functions in Each Operating Mode
The pin functions of port 4 and port A vary depending on the operating mode. Table 3-3 indicates
their functions in each operating mode.
Table 3-3 Pin Functions in Each Mode
Port
Mode 1
Port 4
P4
to P4
7
Port A
PA
to PA
7
Notes: 1. Initial state. The bus mode can be switched by settings in ABWCR. These pins function
as P4
to P4
7
2. Initial state. A
A
output by writing 0 in bits 7 to 5 of BRCR.
21
3.6
Memory Map in Each Operating Mode
Figure 3-1, 3-2 show a memory maps of the H8/3006 and H8/3007. The address space is divided
into eight areas.
The initial bus mode differs between modes 1 and 2, and also between modes 3 and 4.
The address locations of the on-chip RAM and internal I/O registers differ between the 1-Mbyte
modes (modes 1, 2), and the 16-Mbyte modes (modes 3, 4). The address range specifiable by the
CPU in the 8- and 16-bit absolute addressing modes (@aa:8 and @aa:16) also differs.
3.6.1
Note on Reserved Areas
The memory map of the H8/3006 and H8/3007 includes reserved areas to which read/write access
is prohibited. Note that normal operation is not guaranteed if the following reserved areas are
accessed.
The internal I/O register space of the H8/3006 and H8/3007 includes a reserved area to which
access is prohibited. For details, see Appendix B, Internal I/O Registers.
Mode 2
1
*
D
to D
*
0
7
0
PA
to PA
4
7
in 8-bit bus mode, and as D
0
is always an address output pin. PA
20
Mode 3
1
P4
to P4
7
PA
to PA
4
6
to D
in 16-bit bus mode.
7
0
to PA
6
Mode 4
1
1
*
D
to D
*
0
7
0
2
, A
*
PA
to PA
4
20
6
are switched over to A
4
2
, A
*
4
20
to
23
63
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